LOW-JITTER, LOW-NOISE LVPECL-TO-LVDS TRANSLATOR IN AN SC70 PACKAGE
Note to Editors: This product is noteworthy because it is the industry's smallest LVPECL-to-LVDS level translator. It is especially helpful in space-constrained communications applications that require an interface between next-generation ICs using LVDS I/Os and legacy ICs using LVPECL.
SUNNYVALE, CA-November 29, 2001-Maxim Integrated Products introduces the newest member of the Maxim LVDS family - the MAX9156 low-jitter, low-noise LVPECL-to-LVDS translator in an SC70 package. The MAX9156 accepts a single LVPECL input and translates it to a single LVDS output. It is designed to interface between LVPECL and LVDS interfaces in systems that require minimum jitter, noise, power, and space. The MAX9156 is ideal for next-generation communications equipment, such as add/drop muxes, digital cross-connects, DSLAMs, and network switches/routers that are migrating to LVDS clock and data distribution, but are still using some legacy devices with LVPECL I/Os.
Ultra-low, 23psp-p added deterministic jitter and 0.6psRMS added random jitter ensure reliable communication in high-speed links that are highly sensitive to timing errors, especially those incorporating clock-and-data recovery, PLLs, serializers, or deserializers.
The MAX9156? switching performance guarantees 200Mbps data rate, but minimizes radiated noise by guaranteeing 0.5ns minimum output transition time.
The MAX9156 operates from a single +3.3V and consumes only 10mA supply current over a -40°C to +85°C temperature range. Refer to the MAX9129 data sheet for a quad bus LVDS driver and to the MAX9155 data sheet for a low-jitter, low-noise LVDS repeater in an SC70 package. The MAX9156 is available in a 6-pin SC70 package. Prices start at $0.95 (2500-up, FOB USA).
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