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MAX9150
낮은 지터, 10포트 LVDS 리피터

업계 최저 지터 다중포트 LVDS 리피터


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전체 데이터 시트 (PDF, 128kB)
English Download this datasheet in PDF format다운로드
The MAX9150 low-jitter, 10-port, low-voltage differential signaling (LVDS) repeater is designed for applications that require high-speed data or clock distribution while minimizing power, space, and noise. The device accepts a single LVDS input and repeats the signal at 10 LVDS outputs. Each differential output drives a total of 50Ω, allowing point-to-point distribution of signals on transmission lines with 100Ω terminations on each end.

Ultra-low 120ps (max) peak-to-peak jitter (deterministic and random) ensures reliable communication in high-speed links that are highly sensitive to timing error, especially those incorporating clock-and-data recovery, or serializers and deserializers. The high-speed switching performance guarantees 400Mbps data rate and less than 100ps skew between channels while operating from a single +3.3V supply.

Supply current at 400Mbps is 160mA (max) and is reduced to 60µA (max) in low-power shutdown mode. Inputs and outputs conform to the EIA/TIA-644 LVDS standard. A fail-safe feature sets the outputs high when the input is undriven and open, terminated, or shorted. The MAX9150 is available in a 28-pin TSSOP package.

Refer to the MAX9110/MAX9112 and MAX9111/MAX9113 data sheets for LVDS line drivers and receivers.

EV 킷 이용 가능:  MAX9150EVKIT  

주요기능   애플리케이션/용도
  • Ultra-Low 120psp-p (max) Total Jitter (Deterministic and Random)
  • 100ps (max) Skew Between Channels
  • Guaranteed 400Mbps Data Rate
  • 60µA Shutdown Supply Current
  • Conforms to EIA/TIA-644 LVDS Standard
  • Single +3.3V Supply
  • Fail-Safe Circuit Sets Output High for Undriven Inputs
  • High-Impedance LVDS Input when VCC = 0V
 

Key Specifications:  High-Speed Interconnect (Differential Signaling)
Part Number Features Signal Type Signal Type Functions Rx Tx Data Rates
(Mbps)
tPD
(ps)
VSUPPLY
(V)
Price
Rx Tx max See Notes
MAX9150 
Fail-Safe Inputs
Low Power Shutdown Mode
Rx Hi-Z at Power-Off
LVDS LVDS Fan-Out Buffer 1 10 400 3500 3.3 $6.00 @1k
모든 High-Speed Interconnect (Differential Signaling) 보기 (130)

다이어그램
MAX9150: Typical Application Circuit
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    문서 레퍼런스 19-1815; 개정판 1; 2009-12-18
    이 페이지는 최근에 변경됨: 2009-12-18


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