The MAX3831/MAX3832 are 4:1 multiplexers (muxes) and 1:4 demultiplexers (demuxes) with automatic channel alignment. Operating from a single +3.3V supply, the mux receives four parallel, 622Mbps SDH/SONET channels. These channels are bit interleaved to generate a serial data stream of 2.488Gbps for interfacing to an optical or an electrical driver. A 10-bit-wide elastic buffer tolerates up to ±7.5ns skew between any parallel data input and the reference clock. An external 155MHz reference clock is required for the on-chip PLL to synthesize a high-frequency 2.488GHz clock for timing the outgoing data streams.
The MAX3831/MAX3832's demux receives 2.488Gbps serial data and the 2.488GHz clock from an external clock/data recovery device (MAX3876), converting it to four 622Mbps LVDS outputs. The MAX3831 provides a 622MHz LVDS clock output, and the MAX3832 provides a 155MHz LVDS clock output. An internal frame detector looks for a 622Mbps SDH/SONET framing pattern and rolls the demux to maintain proper channel assignment at the outputs.
These devices also include an embedded pattern generator that enables a full-speed, built-in self-test (BIST). Two different loopback modes provide system test flexibility. A TTL loss-of-frame monitor is included. The MAX3831/MAX3832 are available in 64-pin TQFP-EP (exposed paddle) packages and are specified over the upper commercial (0°C to +85°C) temperature range.
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부품번호 suffix: T 또는 T&R = 테잎 앤 릴,
+ = RoHS/lead-free,
# = RoHS/lead 예외.추가 정보: 전체 데이터 시트 또는 부품번호 규칙
*일부 패키지는 크기 편차(variation)를 가지며 이 값은 도면 상에 제시되어 있습니다. “패키지 코드/편차”는 해당 제품이 사용하고 있는 편차를 보여줍니다. 부품번호 suffix에 "+", "#", "-"는 RoHS 준수 상태를 나타냅니다. 패키지 도면에 suffix 문자는 다를 수 있습니다.
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