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Maxim >
제품 >
고주파 ASIC
RF 및 무선
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설계 절차 및 일정
 | Determine feasibility, establish initial objective specification, select process, order software. Sample device models are available to aid process selection. | | Maxim engineers will train you to use Maxim's Design Tools included in the QuickTools™ package. You may also use Microsim Release 8, OrCAD® Release 9.1, or Cadence® (Analog Artist, Virtuoso/Diva). | | Design and simulate the circuit, check for electrical rule violations, and layout your circuit. Maxim reviews both the circuit design and layout. | | Before tapeout, Maxim performs the final layout versus schematic verification, electrical rule check, and layout design rule check. Upon successful completion of final design database verification and a signed customer layout release, Maxim orders masks. | | Using your QuickChip or Full Custom design, Maxim manufactures die. The number of process steps varies with the selected process (CB-2, GST-2, GST-3 or MBiC-1). | | Maxim packages untested prototype die. | | Prototypes can now be evaluated in your application. |
| Test specification, test development, and correlation are finalized. Production starts. |
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