The MAX2990 power line communication (PLC) baseband modem delivers a cost-effective, reliable, half-duplex asynchronous data communication over AC or DC power lines at speeds up to 100kbps. The MAX2990 is a highly integrated system-on-chip (SoC) that combines the physical (PHY) and media access control (MAC) layers using Maxim's 16-bit MAXQ microcontroller core. The MAX2990 utilizes OFDM modulation techniques to enable robust data communication using the same electrical network that supplies power to all other devices on the network.
The MAX2990 includes the MAXQ microcontroller core. The MAXQ is a 16-bit RISC microcontroller with 32kB flash memory, 5.12kB of ROM, and 8kB SRAM, of which 4kB that can be simultaneously accessed by the MCU and the PHY. The MAX2990 is integrated with modules for serial communication (SPI™, I²C, UART) and a real-time clock (RTC) for time stamping, in addition to standard blocks such as timers, GPIO, and external interrupts.
The MAX2990 transceiver is based on an orthogonal frequency division multiplexing (OFDM) technique that allows robust data transmission over poor channel conditions specifically for environments with impulsive noise. OFDM with binary phase shift key (BPSK) and forward error correcting (FEC) blocks are used because of their inherent adaptability in the presence of frequency selective channels without the use of equalizers, resilience to jammer signals, robust communications in the presence of group delay spread, and robustness to impulsive noise. The MAX2990 features jammer cancellation that removes constant sinusoidal interference signals for FCC and ARIB bands. Privacy is provided by DES encryption.
The MAX2990 is available in a 64-pin LQFP package and is specified over the -40°C to +85°C extended temperature range.
주요기능
애플리케이션/용도
Combines the Physical Layer (PHY) and Media Access Controller (MAC)
Integrated Microcontroller with 32kB Password-Protected Flash Memory and 8kB SRAM
Maximum Effective Data Rate in Normal Mode
32kbps at 10kHz to 95kHz and 100kbps at 10kHz to 490kHz
Complies with
CENELEC A (10kHz to 95kHz)
CENELEC B (95kHz to 120kHz)
CENELEC C (120kHz to 140kHz)
FCC (10kHz to 490kHz)
ARIB (10kHz to 450kHz)
Includes Forward Error Correction (FEC) Mechanism and CRC16
Includes Fast DES Engine as the Encryption/Decryption Coprocessor and CRC32
Jammer Cancellation for FCC and ARIB
User-Configured Start and End Operating Frequency
Carrier Sense Multiple Access/Collision Avoidance (CSMA/CA) Channel Access Arbitration
Automatic Repeat Request (ARQ) to Enhance Error Detection and Improve Data Reliability
Supports SPI, I²C, and UART Interfaces
Real-Time Clock (RTC)
PWM Counters
Built-In Test Mode Engine for Identifying Channel Conditions
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