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MAX1214N
1.8V, Low-Power, 12-Bit, 210Msps ADC for Broadband Applications

Pin-Compatible Family of 170Msps to 250Msps, 12-/10-/8-Bit ADCs with the Industry's Best Dynamic Performance


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Description
FULL DATA SHEET (PDF, 740kB)
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The MAX1214N is a monolithic, 12-bit, 210Msps analog-to-digital converter (ADC) optimized for outstanding dynamic performance at high-IF frequencies beyond 300MHz. The product operates with conversion rates up to 210Msps while consuming only 799mW.

At 210Msps and an input frequency up to 100MHz, the MAX1214N achieves an 81.3dBc spurious-free dynamic range (SFDR) with excellent 67dB signal-to-noise ratio (SNR) that remains flat (within 2dB) for input tones up to 250MHz. This makes it ideal for wideband applications such as communications receivers, cable-head end receivers, and power-amplifier predistortion in cellular base-station transceivers.

The MAX1214N operates from a single 1.8V power supply. The analog input is designed for AC-coupled differential or single-ended operation. The ADC also features a selectable on-chip divide-by-2 clock circuit that accepts clock frequencies as high as 420MHz. A low-voltage differential signal (LVDS) sampling clock is recommended for best performance. The converter provides LVDS-compatible digital outputs with data format selectable to be either two's complement or offset binary.

The MAX1214N is available in a 68-pin QFN package with exposed paddle (EP) and is specified over the industrial (-40°C to +85°C) temperature range.

See a parametric table of the complete family of pin-compatible, 8-/10-/12-bit high-speed ADCs.

Key Features   Applications/Uses
  • 210Msps Conversion Rate
  • Excellent Low-Noise Characteristics
    • SNR = 67dB at fIN = 100MHz
    • SNR = 65dB at fIN = 250MHz
  • Excellent Dynamic Range
    • SFDR = 81.3dBc at fIN = 100MHz
    • SFDR = 84.9dBc at fIN = 250MHz
  • Single 1.8V Supply
  • 799mW Power Dissipation at fSAMPLE = 210Msps and fIN = 100MHz
  • On-Chip Track-and-Hold Amplifier
  • Internal 1.24V-Bandgap Reference
  • On-Chip Selectable Divide-by-2 Clock Input
  • LVDS Digital Outputs with Data Clock Output
  • MAX1214NEVKIT Available

 
  • Base-Station Power-Amplifier Linearization
  • Cable-Head End Receivers
  • Communications Test Equipment
  • Radar and Satellite Subsystems
  • Wireless and Wired Broadband Communications

    Key Specifications:   High-Speed ADCs (> 5Msps)
    Part Number Features Resolution (Bits) Sample Rate (max) (Msps) Sample Rate (max) (Msps) AC Specs @ fIN (MHz) SFDR (dBc) SINAD (dB) SNR (dB) INL (±LSB) DNL (±LSB) Full-Power BW (MHz) Typ. Supply Current (mA) Data Bus Interface
    MAX1214N 
    Converter Input Unbuffered
    12 210 210 100 81.3 66.6 67 0.75 0.3 700 444 µP/12
    LVDS
    See All High-Speed ADCs (> 5Msps) (81)

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    Document Ref.: 19-3866; Rev 0; 2006-05-15
    This page last modified: 2007-07-11



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